Indian Institute of Technology Patna (IIT Patna), Department of Research and Development, is inviting applications for recruitment of 1 Junior Research Fellow (JRF) position for a research project on "ML Enabled RISC-V based i-LoRa SOC for Forest Event Monitoring" sponsored by the Ministry of Electronics and Information Technology (MeitY), Government of India under the C2S Programme.
IIT Patna Recruitment 2026 Overview
| Organization | Indian Institute of Technology Patna (IIT Patna) |
| Department | Research and Development Unit / Department of Electrical Engineering |
| Post Name | Junior Research Fellow (JRF) |
| Number of Posts | 1 |
| Advertisement No. | R&D/908/MEM/540 |
| Project Title | ML Enabled RISC-V based i-LoRa SOC for Forest Event Monitoring |
| Funding Agency | Ministry of Electronics and Information Technology (MeitY), Delhi (C2S Programme) |
| Official Website | iitp.ac.in |
Vacancy Details
| Post | Posts | JRF Salary | SRF Salary | Duration |
|---|---|---|---|---|
| Junior Research Fellow (JRF) | 1 | Rs. 37,000/- | Rs. 42,000/- | 2 years as JRF + thereafter as SRF |
Project Details
Project Title
ML Enabled RISC-V based i-LoRa SOC for Forest Event Monitoring
Project Overview
This MeitY-funded research project focuses on developing a Machine Learning-enabled RISC-V based Internet-of-Things (IoT) LoRa System-on-Chip (SOC) for monitoring forest events. The project involves cutting-edge research in VLSI architectures for edge computing, communication systems, and machine learning applications.
Project Code
R&D/SP/EE/MEM/2023-24/908
Research Domain
- VLSI Architectures for edge computing system
- Communication Systems
- Machine Learning
Project Duration
3 years (may extend to another 1 year)
Eligibility Criteria
Essential Qualifications
Candidates must possess any one of the following qualifications:
Option 1: M.Tech Degree
- M.Tech. in VLSI/Embedded System/Microelectronics/Electronics System/Communication System/Instrumentation/Computer Science Engineering from recognized institution
- Minimum CPI: 6.5 or 60% marks
- Must have qualified GATE (within last 5 years)
Option 2: B.Tech/B.E. / B.Sc(Engg.) Degree
- B.Tech/B.E./B.Sc(Engg.) in Electrical/Electronics/Communication/Instrumentation/Computer Science & Engineering
- Minimum CPI: 7.5 or 70% marks
- Must have qualified GATE (within last 5 years)
Option 3: M.Sc. Degree
- M.Sc. in Physics/Mathematics/Electronics/Instrumentation from recognized institution
- Must have qualified GATE or CSIR-NET (within last 5 years)
Desirable Qualifications
- Experience in VLSI design, Embedded systems, or RISC-V architecture
- Knowledge of IoT and LoRa communication protocols
- Background in Machine Learning and signal processing
- Experience with HDL programming (Verilog/VHDL)
- Familiarity with edge computing platforms
Fellowship Amount and Tenure
| Position | Monthly Fellowship | Duration |
|---|---|---|
| Junior Research Fellow (JRF) | Rs. 37,000/- | 2 Years |
| Senior Research Fellow (SRF) - After JRF period | Rs. 42,000/- | Till project completion |
Promotion Pathway
- JRF will be promoted to SRF after 2 years of satisfactory performance
- SRF tenure continues till project completion (within remaining 1-3 years)
- Maximum total engagement: Up to 5 years (2 years as JRF + up to 3 years as SRF)
Important Dates
| Event | Date & Time |
|---|---|
| Advertisement Date | 23.01.2026 |
| Last Date for Application Submission | 17.02.2026 (via email) |
| Shortlist Announcement | 18.02.2026 |
| Written Test | 02.03.2026 at 10:00 AM |
| Personal Interview | 02.03.2026 (Same day after written test) |
| Interview Venue | Department of Electrical Engineering, IIT Patna, Bihta, Patna-801103 |
Application Instructions
How to Apply
- Download the application form from the official notification (Form No. RD-M003)
- Fill the application form completely with all required details
- Prepare a resume highlighting relevant exposure in VLSI, edge computing, ML, or IoT
- Scan the following documents and combine into a single email:
- Completed application form (RD-M003)
- GATE Score Card (scanned copy)
- Resume highlighting relevant project domain exposure
- Educational qualification certificates (scanned copies)
- Mark sheets (scanned copies)
- Send the email to: [email protected]
- Subject line: "Application for JRF - R&D/908/MEM/540"
- Send before 17.02.2026 (deadline)
Required Documents
- Duly filled application form (in prescribed format)
- GATE Score Card (qualified within last 5 years)
- Resume highlighting relevant domain exposure (VLSI/Embedded/ML/IoT)
- B.Tech/B.E./M.Sc./M.Tech Degree Certificate
- Mark sheets of all qualifying examinations
- Class 10 and 12 mark sheets
- Proof of age (Birth certificate or Class 10 certificate)
- Identity proof (Aadhar/PAN/Passport)
- Two passport-size photographs
- At time of interview: Original copies of all supporting documents
Selection Process
- Application Screening: Eligibility verification of submitted applications
- Shortlisting: Candidates meeting eligibility will be shortlisted (intimated on 18.02.2026)
- Written Test: Technical test on 02.03.2026 at 10:00 AM
- Duration: As per IIT Patna norms
- Topics: VLSI Design, Embedded Systems, Communication Systems, Machine Learning basics
- Personal Interview: Same day after written test (02.03.2026)
- Venue: Department of Electrical Engineering, IIT Patna
- Duration: 20-30 minutes
- Assessment of technical knowledge, research aptitude, and communication skills
- Final Selection: Based on overall performance in written test and interview
Travel and Accommodation
- TA Admissibility: Second Class Train fare (shortest route) is admissible for appearing in the interview
- Accommodation: Guest room in student hostel may be arranged for maximum 2 days on prior intimation through email
- How to Request: Inform while submitting application or immediately after shortlisting
Important Information
- This is a research project position, not a regular employment position
- Fellowship is based on satisfactory academic and research performance
- Continuation of fellowship is subject to annual performance review
- JRF can be promoted to SRF after 2 years of satisfactory work
- GATE qualification within last 5 years is mandatory (from advertisement date 23.01.2026)
- CPI/Marks requirement must be met in qualifying degree
- Written test will assess domain knowledge relevant to the project
- Decision of selection committee is final and binding
- IIT Patna reserves the right to cancel or modify the recruitment
- No TA/DA beyond second class train fare will be provided
- Email submission is mandatory; no offline applications accepted
Contact Information
Project Supervisor/Contact Person
Department of Electrical Engineering
Indian Institute of Technology Patna
Bihta, Patna-801106, Bihar
Email: [email protected]
Website: iitp.ac.in
Important Links
| Official Website | Click here |
| Recruitment Notification | Click here |